Impact of gate dielectric thickness on the electrical properties of AlGaN/GaN MISHFETs on Si(111) substrate

2010 ◽  
Vol 207 (6) ◽  
pp. 1342-1344 ◽  
Author(s):  
Martin Eickelkamp ◽  
Dirk Fahle ◽  
Johannes Lindner ◽  
Michael Heuken ◽  
Christian Lautensack ◽  
...  
2002 ◽  
Vol 49 (11) ◽  
pp. 1903-1909 ◽  
Author(s):  
M. Togo ◽  
K. Watanabe ◽  
T. Yamamoto ◽  
N. Ikarashi ◽  
T. Tatsumi ◽  
...  

Author(s):  
V. K. Lamba ◽  
Derick Engles ◽  
S. S. Malik

This work describes computer simulations of various, Silicon on Insulator (SOI) Metal Oxide Semiconductor Field Effect Transistor (MOSFETs) with double and triple-gate structures, as well as gate-all-around devices. To explore the optimum design space for four different gate structures, simulations were performed with four variable device parameters: gate length, channel width, doping concentration, and silicon film thickness. The efficiency of the different gate structures is shown to be dependent of these parameters. Here short-channel properties of multi-gate SOI MOSFETs (MuGFETs) are studied by numerical simulation. The evolution of characteristics such as Drain induced barrier lowering (DIBL), sub-threshold slope, and threshold voltage roll-off is analyzed as a function of channel length, silicon film or fin thickness, gate dielectric thickness and dielectric constant, and as a function of the radius of curvature of the corners. The notion of an equivalent gate number is introduced. As a general rule, increasing the equivalent gate number improves the short-channel behavior of the devices. Similarly, increasing the radius of curvature of the corners improves the control of the channel region by the gate.


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