A 23‐31 GHz gallium nitride high‐robustness low‐noise amplifier with 1.1‐dB noise figure and 28‐dBm saturation output power

2019 ◽  
Vol 62 (3) ◽  
pp. 1077-1081 ◽  
Author(s):  
Penghui Zheng ◽  
Shiyong Zhang ◽  
Jianxing Xu ◽  
Rong Wang ◽  
Xiaodong Tong
Keyword(s):  
Gallium Nitride ◽  
Output Power ◽  
Noise Figure ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Noise Amplifier

Measurement of a 270 GHz Low Noise Amplifier With 7.5 dB Noise Figure

2007 ◽  
Vol 17 (7) ◽  
pp. 546-548 ◽  
Author(s):  
T. Gaier ◽  
L. Samoska ◽  
A. Fung ◽  
W. R. Deal ◽  
V. Radisic ◽  
...  
Keyword(s):  
Noise Figure ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Noise Amplifier

scholarly journals A 0.18um CMOS Low Noise Amplifier for 3-5ghz UWB Receivers

2018 ◽  
Vol 7 (3.6) ◽  
pp. 84
Author(s):  
N Malika Begum ◽  
W Yasmeen
Keyword(s):  
Power Supply ◽  
Noise Figure ◽  
Cmos Technology ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Ultra Wideband ◽  
Noise Amplifier ◽  
5 Ghz ◽  
Chebyshev Filter ◽  
Minimum Noise

This paper presents an Ultra-Wideband (UWB) 3-5 GHz Low Noise Amplifier (LNA) employing Chebyshev filter. The LNA has been designed using Cadence 0.18um CMOS technology. Proposed LNA achieves a minimum noise figure of 2.2dB, power gain of 9dB.The power consumption is 6.3mW from 1.8V power supply.  

scholarly journals A 2.4 GHz low noise amplifier design at 130nm CMOS technology using common gate topology for WiFi / WiMAX application

2017 ◽  
Vol 7 (1.3) ◽  
pp. 69
Author(s):  
M. Ramana Reddy ◽  
N.S Murthy Sharma ◽  
P. Chandra Sekhar
Keyword(s):  
Noise Figure ◽  
Cmos Technology ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Low Power Consumption ◽  
Common Gate ◽  
Chip Size ◽  
Overall Performance ◽  
Amplifier Design ◽  
Noise Amplifier

The proposed work shows an innovative designing in TSMC 130nm CMOS technology. A 2.4 GHz common gate topology low noise amplifier (LNA) using an active inductor to attain the low power consumption and to get the small chip size in layout design. By using this Common gate topology achieves the noise figure of 4dB, Forward gain (S21) parameter of 14.7dB, and the small chip size of 0.26 mm, while 0.8mW power consuming from a 1.1V in 130nm CMOS gives the better noise figure and improved the overall performance.

scholarly journals Design of Low Power UWB CMOS Low Noise Amplifier using Active Inductor for WLAN Receiver

2018 ◽  
Vol 7 (2.24) ◽  
pp. 448
Author(s):  
S Manjula ◽  
M Malleshwari ◽  
M Suganthy
Keyword(s):  
Low Power ◽  
Noise Figure ◽  
Wide Band ◽  
Cmos Technology ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Design System ◽  
Active Inductor ◽  
Chip Area ◽  
Noise Amplifier

This paper presents a low power Low Noise Amplifier (LNA) using 0.18µm CMOS technology for ultra wide band (UWB) applications. gm boosting common gate (CG) LNA is designed to improve the noise performance.  For the reduction of on chip area, active inductor is employed at the input side of the designed LNA for input impedance matching. The proposed UWB LNA is designed using Advanced Design System (ADS) at UWB frequency of 3.1-10.6 GHz. Simulation results show that the gain of 10.74+ 0.01 dB, noise figure is 4.855 dB, input return loss <-13 dB and 12.5 mW power consumption.  

RF Sensor Modules – Needs for Multifunctional Architectures

2016 ◽  
Vol 2016 (CICMT) ◽  
pp. 000207-000210
Author(s):  
Martin Oppermann ◽  
Felix Thurow ◽  
Ralf Rieger
Keyword(s):  
Noise Figure ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Low Loss ◽  
Reflow Soldering ◽  
Operating Modes ◽  
Front End ◽  
Multilayer Ceramic ◽  
Noise Amplifier ◽  
Rf Pcb

Abstract Next generation of RF sensor modules, mainly for airborne applications, will cover a variety of multifunction in terms of different operating modes, e.g. Radar, EW and Communications / Datalinks. The operating frequencies will cover a bandwidth of &gt; 10 GHz and for realisation of modern Active Electronically Steered Antennas (AESA) the Transmit/Receive (T/R) modules have to match with challenging geometry demands, and RF requirements, like switching and filtering between different operational frequencies in transmit and receive mode. New GaN technology based MMICs, e.g. LNA, HPA are in development and multifunctional components (MFC MMICs) cover more than one RF function in one chip. Different front end demonstrators will be presented, based on multilayer ceramic (LTCC) and RF-PCB and associated assembly technologies, like chip&wire and SMD reflow soldering. These TRM front ends include a Low Noise Amplifier with an integrated Switch (LNA/SW) and for characterisation the measured Noise Figure (NF), a key characteristic for receive performance, will be compared. The need for high integration on module level is obvious and therefore specific demands for low loss ceramic and PCB based modules, packages and housings exist.

scholarly journals Design and Analysis of a Continuously Tunable Low Noise Amplifier for Software Defined Radio

Sensors ◽  
2019 ◽  
Vol 19 (6) ◽  
pp. 1273 ◽  
Author(s):  
Aayush Aneja ◽  
Xue Li
Keyword(s):  
Software Defined Radio ◽  
Phase Shifter ◽  
Noise Figure ◽  
Frequency Tuning ◽  
Active Phase ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Impedance Match ◽  
Stable Operation ◽  
Noise Amplifier

This paper presents the design and analysis of a continuously tunable low noise amplifier (LNA) with an operating frequency from 2.2 GHz to 2.8 GHz. Continuous tuning is achieved through a radio frequency impedance transformer network in the input matching stage. The proposed circuit consists of four stages, namely transformer stage, tuning stage, phase shifter and gain stage. Frequency tuning is controlled by varying output current through bias voltage of tuning stage. The circuit includes an active phase shifter in the feedback path of amplifier to shift the phase of the amplified signal. Phase shift is required to further achieve tunability through transformer. The LNA achieves a maximum simulated gain of 18 dB. The LNA attains a perfect impedance match across the tuning range with stable operation. In addition, it achieves a minimum noise figure of 1.4 dB.

scholarly journals Design and Validation of 100 nm GaN-On-Si Ka-Band LNA Based on Custom Noise and Small Signal Models

Electronics ◽  
2020 ◽  
Vol 9 (1) ◽  
pp. 150 ◽  
Author(s):  
Lorenzo Pace ◽  
Sergio Colangeli ◽  
Walter Ciccognani ◽  
Patrick Ettore Longhi ◽  
Ernesto Limiti ◽  
...  
Keyword(s):  
Noise Figure ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Gate Length ◽  
Small Signal ◽  
Linear Measurements ◽  
Ka Band ◽  
Noise Amplifier ◽  
Gan On Si ◽  
Noise Models

In this paper a GaN-on-Si MMIC Low-Noise Amplifier (LNA) working in the Ka-band is shown. The chosen technology for the design is a 100 nm gate length HEMT provided by OMMIC foundry. Both small-signal and noise models had been previously extracted by the means of an extensive measurement campaign, and were then employed in the design of the presented LNA. The amplifier presents an average noise figure of 2.4 dB, a 30 dB average gain value, and input/output matching higher than 10 dB in the whole 34–37.5 Ghz design band, while non-linear measurements testify a minimum output 1 dB compression point of 23 dBm in the specific 35–36.5 GHz target band. This shows the suitability of the chosen technology for low-noise applications.

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