Dynamic Random Access Memory Effect and Memory Device Derived from a Functional Polyimide Containing Electron Donor-Acceptor Pairs in the Main Chain

2010 ◽  
Vol 32 (4) ◽  
pp. 384-389 ◽  
Author(s):  
Guofeng Tian ◽  
Dezhen Wu ◽  
Shengli Qi ◽  
Zhanpeng Wu ◽  
Xiaodong Wang
Keyword(s):  
Memory Effect ◽  
Electron Donor ◽  
Main Chain ◽  
Random Access ◽  
Random Access Memory ◽  
Memory Device ◽  
Dynamic Random Access Memory ◽  
Access Memory ◽  
Donor Acceptor

scholarly journals Analysis of a Lateral Grain Boundary for Reducing Performance Variations in Poly-Si 1T-DRAM

Micromachines ◽  
2020 ◽  
Vol 11 (11) ◽  
pp. 952
Author(s):  
Songyi Yoo ◽  
Wookyung Sun ◽  
Hyungsoon Shin
Keyword(s):  
Retention Time ◽  
Computer Aided Design ◽  
Memory Performance ◽  
Scaling Limit ◽  
Random Access ◽  
Random Access Memory ◽  
Memory Device ◽  
Dynamic Random Access Memory ◽  
Access Memory ◽  
Aided Design

A capacitorless one-transistor dynamic random-access memory device that uses a poly-silicon body (poly-Si 1T-DRAM) has been suggested to overcome the scaling limit of conventional one-transistor one-capacitor dynamic random-access memory (1T-1C DRAM). A poly-Si 1T-DRAM cell operates as a memory by utilizing the charge trapped at the grain boundaries (GBs) of its poly-Si body; vertical GBs are formed randomly during fabrication. This paper describes technology computer aided design (TCAD) device simulations performed to investigate the sensing margin and retention time of poly-Si 1T-DRAM as a function of its lateral GB location. The results show that the memory’s operating mechanism changes with the GB’s lateral location because of a corresponding change in the number of trapped electrons or holes. We determined the optimum lateral GB location for the best memory performance by considering both the sensing margin and retention time. We also performed simulations to analyze the effect of a lateral GB on the operation of a poly-Si 1T-DRAM that has a vertical GB. The memory performance of devices without a lateral GB significantly deteriorates when a vertical GB is located near the source or drain junction, while devices with a lateral GB have little change in memory characteristics with different vertical GB locations. This means that poly-Si 1T-DRAM devices with a lateral GB can operate reliably without any memory performance degradation from randomly determined vertical GB locations.

A Dynamic Random Access Memory Based on a Conjugated Copolymer Containing Electron-Donor and -Acceptor Moieties

2006 ◽  
Vol 118 (18) ◽  
pp. 3013-3017 ◽  
Author(s):  
Qi-Dan Ling ◽  
Yan Song ◽  
Siew-Lay Lim ◽  
Eric Yeow-Hwee Teo ◽  
Yoke-Ping Tan ◽  
...  
Keyword(s):  
Electron Donor ◽  
Random Access ◽  
Random Access Memory ◽  
Dynamic Random Access Memory ◽  
Access Memory ◽  
Donor And Acceptor ◽  
Electron Donor And Acceptor ◽  
Conjugated Copolymer

scholarly journals A Novel One-Transistor Dynamic Random-Access Memory (1T DRAM) Featuring Partially Inserted Wide-Bandgap Double Barriers for High-Temperature Applications

Micromachines ◽  
2018 ◽  
Vol 9 (11) ◽  
pp. 581 ◽  
Author(s):  
Myeongsun Kim ◽  
Jongmin Ha ◽  
Ikhyeon Kwon ◽  
Jae-Hee Han ◽  
Seongjae Cho ◽  
...  
Keyword(s):  
High Temperature ◽  
Computer Aided Design ◽  
Impact Ionization ◽  
Random Access ◽  
Random Access Memory ◽  
Memory Device ◽  
Wide Bandgap ◽  
Dynamic Random Access Memory ◽  
Access Memory ◽  
Wide Bandgap Semiconductor

These days, the demand on electronic systems operating at high temperature is increasing owing to bursting interest in applications adaptable to harsh environments on earth, as well as in the unpaved spaces in the universe. However, research on memory technologies suitable to high-temperature conditions have been seldom reported yet. In this work, a novel one-transistor dynamic random-access memory (1T DRAM) featuring the device channel with partially inserted wide-bandgap semiconductor material toward the high-temperature application is proposed and designed, and its device performances are investigated with an emphasis at 500 K. The possibilities of the program operation by impact ionization and the erase operation via drift conduction by a properly high drain voltage have been verified through a series of technology computer-aided design (TCAD) device simulations at 500 K. Analyses of the energy-band structures in the hold state reveals that the electrons stored in the channel can be effectively confined and retained by the surrounding thin wide-bandgap semiconductor barriers. Additionally, for more realistic and practical claims, transient characteristics of the proposed volatile memory device have been closely investigated quantifying the programming window and retention time. Although there is an inevitable degradation in state-1/state-0 current ratio compared with the case of room-temperature operation, the high-temperature operation capabilities of the proposed memory device at 500 K have been confirmed to fall into the regime permissible for practical use.

scholarly journals Publisher's Note: “Set statistics in conductive bridge random access memory device with Cu/HfO2/Pt structure” [Appl. Phys. Lett. 105, 193501 (2014)]

2015 ◽  
Vol 106 (15) ◽  
pp. 159901
Author(s):  
Meiyun Zhang ◽  
Shibing Long ◽  
Guoming Wang ◽  
Xiaoxin Xu ◽  
Yang Li ◽  
...  
Keyword(s):  
Random Access ◽  
Random Access Memory ◽  
Memory Device ◽  
Access Memory ◽  
Conductive Bridge
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