Subthreshold current modeling for fully depleted short channel double-gate MOSFETs with consideration of structure asymmetry

2013 ◽  
Vol 27 (5-6) ◽  
pp. 875-882
Author(s):  
Xi Liu ◽  
Xiaoshi Jin ◽  
Jong-Ho Lee
Keyword(s):  
Double Gate ◽  
Short Channel ◽  
Fully Depleted ◽  
Subthreshold Current

Analytical subthreshold current and subthreshold swing models of short-channel dual-metal-gate (DMG) fully-depleted recessed-source/drain (Re-S/D) SOI MOSFETs

2014 ◽  
Vol 13 (2) ◽  
pp. 467-476 ◽  
Author(s):  
Gopi Krishna Saramekala ◽  
Abirmoya Santra ◽  
Mirgender Kumar ◽  
Sarvesh Dubey ◽  
Satyabrata Jit ◽  
...  
Keyword(s):  
Subthreshold Swing ◽  
Metal Gate ◽  
Short Channel ◽  
Fully Depleted ◽  
Subthreshold Current ◽  
Dual Metal

scholarly journals Design Consideration and Impact of Gate Length Variation on Junctionless Strained Double Gate MOSFET

2019 ◽  
Vol 8 (2S6) ◽  
pp. 783-791
Keyword(s):  
Field Effect Transistors ◽  
Scaling Limit ◽  
Drain Current ◽  
Oxide Semiconductor ◽  
Length Variation ◽  
Gate Length ◽  
Double Gate ◽  
Simulation Design ◽  
Short Channel ◽  
Fully Depleted

Aggressive scaling of Metal-oxide-semiconductor Field Effect Transistors (MOSFET) have been conducted over the past several decades and now is becoming more intricate due to its scaling limit and short channel effects (SCE). To overcome this adversity, a lot of new transistor structures have been proposed, including multi gate structure, high-k/metal gate stack, strained channel, fully-depleted body and junctionless configuration. This paper describes a comprehensive 2-D simulation design of a proposed transistor that employs all the aforementioned structures, named as Junctionless Strained Double Gate MOSFETs (JLSDGM). Variation in critical design parameter such as gate length (Lg ) is considered and its impact on the output properties is comprehensively investigated. The results shows that the variation in gate length (Lg ) does contributes a significant impact on the drain current (ID), on-current (ION), off-current (IOFF), ION/IOFF ratio, subthreshold swing (SS) and transconductance (gm). The JLSDGM device with the least investigated gate length (4nm) still provides remarkable device properties in which both ION and gm(max) are measured at 1680 µA/µm and 2.79 mS/µm respectively

Sign in / Sign up

Export Citation Format

Share Document