A study on hybrid switch architecture using hierarchical memory system

Hiroshi Ishikawa; Yasuharu Kosuge; Noriharu Miyaho

doi:10.1002/ecja.4410690112

A study on hybrid switch architecture using hierarchical memory system

Electronics and Communications in Japan (Part I Communications) ◽

10.1002/ecja.4410690112 ◽

1986 ◽

Vol 69 (1) ◽

pp. 103-111

Author(s):

Hiroshi Ishikawa ◽

Yasuharu Kosuge ◽

Noriharu Miyaho

Keyword(s):

Memory System ◽

Hierarchical Memory ◽

Switch Architecture

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Hierarchical Memory System

Encyclopedia of Database Systems ◽

10.1007/978-0-387-39940-9_2757 ◽

2009 ◽

pp. 1307-1307

Keyword(s):

Memory System ◽

Hierarchical Memory

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Interchanging Tw Segments of an Array in a Hierarchical Memory System

Algorithm Engineering - Lecture Notes in Computer Science ◽

10.1007/3-540-44691-5_14 ◽

2001 ◽

pp. 159-170

Author(s):

Jesper Bojesen ◽

Jyrki Katajainen

Keyword(s):

Memory System ◽

Hierarchical Memory

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A hierarchical memory system environment

Proceedings of the 1998 workshop on Computer architecture education - WCAE '98 ◽

10.1145/1275182.1275205 ◽

1998 ◽

Cited By ~ 4

Author(s):

J. Djordjevic ◽

A. Milenkovic ◽

S. Prodanovic

Keyword(s):

Memory System ◽

Hierarchical Memory ◽

System Environment

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Hierarchical Memory System With STT-MRAM and SRAM to Support Transfer and Real-Time Reinforcement Learning in Autonomous Drones

IEEE Journal on Emerging and Selected Topics in Circuits and Systems ◽

10.1109/jetcas.2019.2932285 ◽

2019 ◽

Vol 9 (3) ◽

pp. 485-497

Author(s):

Insik Yoon ◽

Malik Aqeel Anwar ◽

Rajiv V. Joshi ◽

Titash Rakshit ◽

Arijit Raychowdhury

Keyword(s):

Reinforcement Learning ◽

Real Time ◽

Memory System ◽

Hierarchical Memory

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Hierarchical memory system design for a heterogeneous multi-core processor

Proceedings of the 2008 ACM symposium on Applied computing - SAC '08 ◽

10.1145/1363686.1364039 ◽

2008 ◽

Author(s):

Jianjun Guo ◽

Mingche Lai ◽

Zhengyuan Pang ◽

Libo Huang ◽

Fangyuan Chen ◽

...

Keyword(s):

System Design ◽

Memory System ◽

Hierarchical Memory ◽

Multi Core Processor ◽

Memory System Design

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Analysis of branch handling strategies under hierarchical memory system

IEE Proceedings E Computers and Digital Techniques ◽

10.1049/ip-e.1991.0044 ◽

1991 ◽

Vol 138 (5) ◽

pp. 319

Author(s):

Hung-Chang Lee ◽

Feipei Lai

Keyword(s):

Memory System ◽

Hierarchical Memory

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Hierarchical Memory System

10.1007/springerreference_65046 ◽

2011 ◽

Keyword(s):

Memory System ◽

Hierarchical Memory

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Minimization of the mean access time to the hierarchical memory system

2012 2nd International Conference "Methods and Systems of Navigation and Motion Control" (MSNMC) ◽

10.1109/msnmc.2012.6475089 ◽

2012 ◽

Author(s):

Alexander Yurchenko ◽

Mykola Tupitsyn ◽

Illiya Stepaneneko

Keyword(s):

Memory System ◽

Access Time ◽

Hierarchical Memory ◽

The Mean

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Study and implementation of cluster hierarchical memory system of multicore cryptographic processor

2015 IEEE 11th International Conference on ASIC (ASICON) ◽

10.1109/asicon.2015.7517211 ◽

2015 ◽

Author(s):

Junwei Li ◽

Zibin Dai ◽

Wei Li ◽

Tao Chen ◽

Yufei Zhu

Keyword(s):

Memory System ◽

Hierarchical Memory

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Designing linear algebra algorithms on the IBM 3090 vector multiprocessor with a hierarchical memory system

CALCOLO ◽

10.1007/bf02575752 ◽

1988 ◽

Vol 25 (1-2) ◽

pp. 153-167

Author(s):

G. Radicati ◽

Y. Robert ◽

P. Sguazzero

Keyword(s):

Linear Algebra ◽

Memory System ◽

Hierarchical Memory ◽

Vector Multiprocessor

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