Best candidate integrated technology for low-noise, high-speed, and wide bandwidth-based transimpedance amplifiers in optical computing systems and optical fiber applications

2018 ◽  
Vol 31 (17) ◽  
pp. e3801 ◽  
Author(s):  
Ahmed Nabih Zaki Rashed ◽  
Mohammed Salah F. Tabbour
Keyword(s):  
Optical Fiber ◽  
High Speed ◽  
Optical Computing ◽  
Low Noise ◽  
Wide Bandwidth ◽  
Computing Systems ◽  
Transimpedance Amplifiers ◽  
Integrated Technology ◽  
Optical Fiber Applications

High speed liquid scintillators for optical fiber applications

1982 ◽  
Vol 193 (3) ◽  
pp. 623-629 ◽  
Author(s):  
S.S. Lutz ◽  
L.A. Franks ◽  
J.M. Flournoy ◽  
P.B. Lyons
Keyword(s):  
Optical Fiber ◽  
High Speed ◽  
Optical Fiber Applications

scholarly journals Research on Performance Test System of Space Harmonic Reducer in High Vacuum and Low Temperature Environment

Machines ◽  
2020 ◽  
Vol 9 (1) ◽  
pp. 1
Author(s):  
Jing Wang ◽  
Zhihua Wan ◽  
Zhurong Dong ◽  
Zhengguo Li
Keyword(s):  
Low Temperature ◽  
High Speed ◽  
Performance Test ◽  
High Reliability ◽  
High Vacuum ◽  
Test System ◽  
Low Noise ◽  
Speed Ratio ◽  
Space Harmonic ◽  
Temperature Environment

The harmonic reducer, with its advantages of high precision, low noise, light weight, and high speed ratio, has been widely used in aerospace solar wing deployment mechanisms, antenna pointing mechanisms, robot joints, and other precision transmission fields. Accurately predicting the performance of the harmonic reducer under various application conditions is of great significance to the high reliability and long life of the harmonic reducer. In this paper, a set of automatic harmonic reducer performance test systems is designed. By using the CANOpen bus interface to control the servo motor as the drive motor, through accurately controlling the motor speed and rotation angle, collecting the angle, torque, and current in real time, the life cycle test of space harmonic reducer was carried out in high vacuum and low temperature environment on the ground. Then, the collected data were automatically analyzed and calculated. The test data of the transmission accuracy, backlash, and transmission efficiency of the space harmonic reducer were obtained. It is proven by experiments that the performance data of the harmonic reducer in space work can be more accurately obtained by using the test system mentioned in this paper, which is convenient for further research on related lubricating materials.

scholarly journals Study on the Implementation of a Simple and Effective Memory System for an AI Chip

Electronics ◽  
2021 ◽  
Vol 10 (12) ◽  
pp. 1399
Author(s):  
Taepyeong Kim ◽  
Sangun Park ◽  
Yongbeom Cho
Keyword(s):  
High Speed ◽  
Memory Systems ◽  
Memory System ◽  
External Memory ◽  
Essential Factor ◽  
Wide Bandwidth ◽  
Reading And Writing ◽  
Data Skew ◽  
Lower Performance ◽  
Efficient Memory

In this study, a simple and effective memory system required for the implementation of an AI chip is proposed. To implement an AI chip, the use of internal or external memory is an essential factor, because the reading and writing of data in memory occurs a lot. Those memory systems that are currently used are large in design size and complex to implement in order to handle a high speed and a wide bandwidth. Therefore, depending on the AI application, there are cases where the circuit size of the memory system is larger than that of the AI core. In this study, SDRAM, which has a lower performance than the currently used memory system but does not have a problem in operating AI, was used and all circuits were implemented digitally for simple and efficient implementation. In particular, a delay controller was designed to reduce the error due to data skew inside the memory bus to ensure stability in reading and writing data. First of all, it verified the memory system based on the You Only Look Once (YOLO) algorithm in FPGA to confirm that the memory system proposed in AI works efficiently. Based on the proven memory system, we implemented a chip using Samsung Electronics’ 65 nm process and tested it. As a result, we designed a simple and efficient memory system for AI chip implementation and verified it with hardware.

High speed optical switching gain based EDFA model with 30 Gb/s NRZ modulation code in optical systems

2020 ◽  
Vol 0 (0) ◽  
Author(s):  
Mahmoud M. A. Eid ◽  
Ahmed Nabih Zaki Rashed ◽  
Keyword(s):  
Optical Fiber ◽  
High Speed ◽  
Optical Switching ◽  
Fiber Amplifier ◽  
Optical Systems ◽  
Power Budget ◽  
Erbium Doped Fiber Amplifier ◽  
Amplifier Model ◽  
Modulation Rate ◽  
Modulation Code

AbstractThis study presents high speed optical switching gain based Erbium doped fiber amplifier model. By using the proposed model the optical fiber loss can be minimized. The system is stabilized with the power budget of 25.875 mW a long 75 km as a length of optical fiber in this study can be verified. The modulation rate of 10 Gb/s can be upgrade up to reach 30 Gb/s. The suitable power for the optical transmitter is −2.440 dBm and NRZ modulation code is verified. The receiver sensitivity can be upgraded with the minimum bit error rate and max Q factor are 1.806 e−009 and 5.899.

scholarly journals NanoLEDs for energy-efficient and gigahertz-speed spike-based sub-λ neuromorphic nanophotonic computing

Nanophotonics ◽  
2020 ◽  
Vol 9 (13) ◽  
pp. 4149-4162 ◽  
Author(s):  
Bruno Romeira ◽  
José M. L. Figueiredo ◽  
Julien Javaloyes
Keyword(s):  
Neural Networks ◽  
Energy Efficient ◽  
High Speed ◽  
Dynamic Properties ◽  
Optical Computing ◽  
Differential Conductance ◽  
Rate Equations ◽  
Dynamical Equations ◽  
Electrical Modulation ◽  
High Bandwidth

AbstractEvent-activated biological-inspired subwavelength (sub-λ) photonic neural networks are of key importance for future energy-efficient and high-bandwidth artificial intelligence systems. However, a miniaturized light-emitting nanosource for spike-based operation of interest for neuromorphic optical computing is still lacking. In this work, we propose and theoretically analyze a novel nanoscale nanophotonic neuron circuit. It is formed by a quantum resonant tunneling (QRT) nanostructure monolithic integrated into a sub-λ metal-cavity nanolight-emitting diode (nanoLED). The resulting optical nanosource displays a negative differential conductance which controls the all-or-nothing optical spiking response of the nanoLED. Here we demonstrate efficient activation of the spiking response via high-speed nonlinear electrical modulation of the nanoLED. A model that combines the dynamical equations of the circuit which considers the nonlinear voltage-controlled current characteristic, and rate equations that takes into account the Purcell enhancement of the spontaneous emission, is used to provide a theoretical framework to investigate the optical spiking dynamic properties of the neuromorphic nanoLED. We show inhibitory- and excitatory-like optical spikes at multi-gigahertz speeds can be achieved upon receiving exceptionally low (sub-10 mV) synaptic-like electrical activation signals, lower than biological voltages of 100 mV, and with remarkably low energy consumption, in the range of 10–100 fJ per emitted spike. Importantly, the energy per spike is roughly constant and almost independent of the incoming modulating frequency signal, which is markedly different from conventional current modulation schemes. This method of spike generation in neuromorphic nanoLED devices paves the way for sub-λ incoherent neural elements for fast and efficient asynchronous neural computation in photonic spiking neural networks.

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