Digitally-assisted constant-on-time dynamic-biasing technique for bandwidth and slew-rate enhancement in ultra-low-power low-dropout regulator

2015 ◽  
Vol 44 (2) ◽  
pp. 504-513 ◽  
Author(s):  
Jianping Guo ◽  
Marco Ho ◽  
Ka Nang Leung ◽  
Guangxiang Li
Keyword(s):  
Low Power ◽  
Slew Rate ◽  
Ultra Low Power ◽  
Rate Enhancement ◽  
Time Dynamic ◽  
Dynamic Biasing ◽  
Low Dropout Regulator

An ultra-low power output capacitor-less low-dropout regulator with slew-rate-enhanced circuit

2018 ◽  
Vol 39 (3) ◽  
pp. 035002 ◽  
Author(s):  
Xin Cheng ◽  
Yu Zhang ◽  
Guangjun Xie ◽  
Yizhong Yang ◽  
Zhang Zhang
Keyword(s):  
Low Power ◽  
Power Output ◽  
Slew Rate ◽  
Ultra Low Power ◽  
Low Dropout Regulator ◽  
Output Capacitor

scholarly journals A 0.3 V Rail-to-Rail Ultra-Low-Power OTA with Improved Bandwidth and Slew Rate

2021 ◽  
Vol 11 (2) ◽  
pp. 19
Author(s):  
Francesco Centurelli ◽  
Riccardo Della Sala ◽  
Pietro Monsurrò ◽  
Giuseppe Scotti ◽  
Alessandro Trifiletti
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Supply Voltage ◽  
Cmos Process ◽  
Slew Rate ◽  
Large Signal ◽  
Output Stage ◽  
Ultra Low Power ◽  
Input Stage ◽  
Rail To Rail

In this paper, we present a novel operational transconductance amplifier (OTA) topology based on a dual-path body-driven input stage that exploits a body-driven current mirror-active load and targets ultra-low-power (ULP) and ultra-low-voltage (ULV) applications, such as IoT or biomedical devices. The proposed OTA exhibits only one high-impedance node, and can therefore be compensated at the output stage, thus not requiring Miller compensation. The input stage ensures rail-to-rail input common-mode range, whereas the gate-driven output stage ensures both a high open-loop gain and an enhanced slew rate. The proposed amplifier was designed in an STMicroelectronics 130 nm CMOS process with a nominal supply voltage of only 0.3 V, and it achieved very good values for both the small-signal and large-signal Figures of Merit. Extensive PVT (process, supply voltage, and temperature) and mismatch simulations are reported to prove the robustness of the proposed amplifier.

Ultra low power capless LDO with dynamic biasing of derivative feedback

2013 ◽  
Vol 44 (2) ◽  
pp. 94-102 ◽  
Author(s):  
Jorge Esteves ◽  
João Pereira ◽  
Júlio Paisana ◽  
Marcelino Santos
Keyword(s):  
Low Power ◽  
Ultra Low Power ◽  
Dynamic Biasing

IMPROVED LOW-POWER HIGH-SPEED BUFFER AMPLIFIER WITH SLEW-RATE ENHANCEMENT FOR LCD APPLICATIONS

2010 ◽  
Vol 19 (02) ◽  
pp. 325-334 ◽  
Author(s):  
DAVIDE MARANO ◽  
GAETANO PALUMBO ◽  
SALVATORE PENNISI
Keyword(s):  
Low Power ◽  
High Speed ◽  
Liquid Crystal Display ◽  
Slew Rate ◽  
Output Stage ◽  
Line Load ◽  
Rate Enhancement ◽  
Static Operation ◽  
Limited Power ◽  
Buffer Amplifier

The present paper addresses an improved low-power high-speed buffer amplifier topology for large-size liquid crystal display applications. The proposed buffer achieves high-speed driving performance while drawing a low quiescent current during static operation. The circuit offers enhanced slewing capabilities with a limited power consumption by exploiting a slew detector which monitors the output voltage of the input differential amplifier and outputs an additional current signal providing slew-rate enhancement at the output stage. Post-layout simulations show that the proposed buffer can drive a 1 nF column line load with 8.5 V/μs slew-rate and 0.8 μs settling time, while drawing only 8 μA static current from a 3 V power supply.

A Fast Transient and Low Power Capacitor-less Low-dropout Regulator using Advanced Dynamic Biasing Method

2019 ◽  
Vol 19 (3) ◽  
pp. 254-259
Author(s):  
Jae-Hoon Jung ◽  
Jae-Hyung Jung ◽  
Young-Ho Jung ◽  
Hoe-Eung Jeong ◽  
Seong-Kwan Hong ◽  
...  
Keyword(s):  
Low Power ◽  
Dynamic Biasing ◽  
Fast Transient ◽  
Low Dropout Regulator

A Fully Differential Operational Amplifier with Slew Rate Enhancer and Adaptive Bias for Ultra Low Power

2017 ◽  
Vol 13 (1) ◽  
pp. 67-75 ◽  
Author(s):  
P. Karuppanan ◽  
Soumya Ranjan Ghosh ◽  
Kamran Khan ◽  
Pavan Kumar Bikki
Keyword(s):  
Low Power ◽  
Operational Amplifier ◽  
Slew Rate ◽  
Ultra Low Power ◽  
Fully Differential

A low-power fast transient output capacitor-free adaptively biased LDO based on slew rate enhancement for SoC applications

2015 ◽  
Vol 46 (8) ◽  
pp. 740-749 ◽  
Author(s):  
Chee-Cheow Lim ◽  
Nai-Shyan Lai ◽  
Gim-Heng Tan ◽  
Harikrishnan Ramiah
Keyword(s):  
Low Power ◽  
Slew Rate ◽  
Rate Enhancement ◽  
Fast Transient ◽  
Output Capacitor
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