PDNOC: Partially diagonal network-on-chip for high efficiency multicore systems

Thomas Canhao Xu; Ville Leppänen; Pasi Liljeberg; Juha Plosila; Hannu Tenhunen

doi:10.1002/cpe.3364

PDNOC: Partially diagonal network-on-chip for high efficiency multicore systems

Concurrency and Computation Practice and Experience ◽

10.1002/cpe.3364 ◽

2014 ◽

Vol 27 (4) ◽

pp. 1054-1067 ◽

Cited By ~ 6

Author(s):

Thomas Canhao Xu ◽

Ville Leppänen ◽

Pasi Liljeberg ◽

Juha Plosila ◽

Hannu Tenhunen

Keyword(s):

High Efficiency ◽

Network On Chip ◽

Multicore Systems ◽

On Chip

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Dynamic task allocation and scheduling with contention-awareness for Network-on-Chip based multicore systems

Journal of Systems Architecture ◽

10.1016/j.sysarc.2021.102020 ◽

2021 ◽

Vol 115 ◽

pp. 102020

Author(s):

Suraj Paul ◽

Navonil Chatterjee ◽

Prasun Ghosal

Keyword(s):

Task Allocation ◽

Network On Chip ◽

Multicore Systems ◽

Dynamic Task ◽

Dynamic Task Allocation ◽

Task Allocation And Scheduling ◽

On Chip

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A Novel Wireless Network-on-Chip Architecture for Multicore Systems

2021 26th International Computer Conference, Computer Society of Iran (CSICC) ◽

10.1109/csicc52343.2021.9420564 ◽

2021 ◽

Author(s):

Esmaeel Tahanian ◽

Mohsen Rezvani ◽

Mansoor Fateh

Keyword(s):

Wireless Network ◽

Network On Chip ◽

Multicore Systems ◽

On Chip

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Design and performance evaluation of Mesh-of-Tree-based hierarchical wireless network-on-chip for multicore systems

Journal of Parallel and Distributed Computing ◽

10.1016/j.jpdc.2018.09.008 ◽

2019 ◽

Vol 123 ◽

pp. 100-117 ◽

Cited By ~ 4

Author(s):

Abbas Dehghani ◽

Keyvan RahimiZadeh

Keyword(s):

Performance Evaluation ◽

Wireless Network ◽

Network On Chip ◽

Multicore Systems ◽

And Performance ◽

On Chip

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PaSE: A parallel speedup estimation framework for Network-on-Chip based multicore systems

2017 Eighth International Green and Sustainable Computing Conference (IGSC) ◽

10.1109/igcc.2017.8323601 ◽

2017 ◽

Author(s):

Ghassan Dharb ◽

Naseef Mansoor ◽

Sajeed Shahriat ◽

Amlan Ganguly

Keyword(s):

Network On Chip ◽

Multicore Systems ◽

Parallel Speedup ◽

On Chip

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Scalable Hybrid Wireless Network-on-Chip Architectures for Multicore Systems

IEEE Transactions on Computers ◽

10.1109/tc.2010.176 ◽

2011 ◽

Vol 60 (10) ◽

pp. 1485-1502 ◽

Cited By ~ 157

Author(s):

Amlan Ganguly ◽

Kevin Chang ◽

Sujay Deb ◽

Partha Pratim Pande ◽

Benjamin Belzer ◽

...

Keyword(s):

Wireless Network ◽

Network On Chip ◽

Multicore Systems ◽

Hybrid Wireless Network ◽

On Chip

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Dynamic Task Mapping and Scheduling with Temperature-Awareness on Network-on-Chip based Multicore Systems

Journal of Systems Architecture ◽

10.1016/j.sysarc.2019.08.002 ◽

2019 ◽

Vol 98 ◽

pp. 271-288 ◽

Cited By ~ 5

Author(s):

Suraj Paul ◽

Navonil Chatterjee ◽

Prasun Ghosal

Keyword(s):

Network On Chip ◽

Task Mapping ◽

Multicore Systems ◽

Dynamic Task ◽

On Chip

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A permanent fault tolerant dynamic task allocation approach for Network-on-Chip based multicore systems

Journal of Systems Architecture ◽

10.1016/j.sysarc.2018.10.003 ◽

2019 ◽

Vol 97 ◽

pp. 287-303 ◽

Cited By ~ 3

Author(s):

Suraj Paul ◽

Navonil Chatterjee ◽

Prasun Ghosal

Keyword(s):

Task Allocation ◽

Fault Tolerant ◽

Network On Chip ◽

Multicore Systems ◽

Permanent Fault ◽

Dynamic Task ◽

Dynamic Task Allocation ◽

On Chip ◽

Allocation Approach

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A high-efficiency low-cost heterogeneous 3D network-on-chip design

Proceedings of the Fifth International Workshop on Network on Chip Architectures - NoCArc '12 ◽

10.1145/2401716.2401725 ◽

2012 ◽

Cited By ~ 10

Author(s):

Thomas Canhao Xu ◽

Pasi Liljeberg ◽

Juha Plosila ◽

Hannu Tenhunen

Keyword(s):

High Efficiency ◽

Low Cost ◽

Network On Chip ◽

Chip Design ◽

3D Network ◽

On Chip

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Quarc: A High-Efficiency Network on-Chip Architecture

2009 International Conference on Advanced Information Networking and Applications ◽

10.1109/aina.2009.64 ◽

2009 ◽

Cited By ~ 7

Author(s):

Mahmoud Moadeli ◽

Partha Maji ◽

Wim Vanderbauwhede

Keyword(s):

High Efficiency ◽

Network On Chip ◽

On Chip

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Comparison of Network-on-Chip Topologies for Multicore Systems Considering Multicast and Local Traffic

Proceedings of the Second International ICST Conference on Simulation Tools and Techniques ◽

10.4108/icst.simutools2009.5590 ◽

2009 ◽

Cited By ~ 1

Author(s):

Dietmar Tutsch ◽

Miroslaw Malek

Keyword(s):

Network On Chip ◽

Multicore Systems ◽

On Chip

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