Low‐Voltage Operable and Strain‐Insensitive Stretchable All‐Carbon Nanotube Integrated Circuits with Local Strain Suppression Layer

2020 ◽  
pp. 2000674
Author(s):  
Yuya Nishio ◽  
Jun Hirotani ◽  
Shigeru Kishimoto ◽  
Hiromichi Kataura ◽  
Yutaka Ohno
Keyword(s):  
Carbon Nanotube ◽  
Integrated Circuits ◽  
Low Voltage ◽  
Local Strain

Carbon nanotube based ultra-low voltage integrated circuits: Scaling down to 0.4 V

2012 ◽  
Vol 100 (26) ◽  
pp. 263116 ◽  
Author(s):  
Li Ding ◽  
Shibo Liang ◽  
Tian Pei ◽  
Zhiyong Zhang ◽  
Sheng Wang ◽  
...  
Keyword(s):  
Carbon Nanotube ◽  
Integrated Circuits ◽  
Low Voltage ◽  
Scaling Down

Linewidth measurement using the low voltage SEM

1986 ◽  
Vol 44 ◽  
pp. 652-653
Author(s):  
M.G. Rosenfield
Keyword(s):  
Electron Microscope ◽  
Scanning Electron Microscope ◽  
Integrated Circuits ◽  
Secondary Electron ◽  
Low Voltage ◽  
Fabrication Process ◽  
Critical Dimensions ◽  
Linewidth Measurement ◽  
Threshold Technique ◽  
Scanning Electron

Minimum feature sizes in experimental integrated circuits are approaching 0.5 μm and below. During the fabrication process it is usually necessary to be able to non-destructively measure the critical dimensions in resist and after the various process steps. This can be accomplished using the low voltage SEM. Submicron linewidth measurement is typically done by manually measuring the SEM micrographs. Since it is desirable to make as many measurements as possible in the shortest period of time, it is important that this technique be automated.Linewidth measurement using the scanning electron microscope is not well understood. The basic intent is to measure the size of a structure from the secondary electron signal generated by that structure. Thus, it is important to understand how the actual dimension of the line being measured relates to the secondary electron signal. Since different features generate different signals, the same method of relating linewidth to signal cannot be used. For example, the peak to peak method may be used to accurately measure the linewidth of an isolated resist line; but, a threshold technique may be required for an isolated space in resist.

scholarly journals Design of an Ultra-Low Voltage Bias Current Generator Highly Immune to Electromagnetic Interference

2021 ◽  
Vol 11 (1) ◽  
pp. 6
Author(s):  
Orazio Aiello
Keyword(s):  
Integrated Circuits ◽  
Electromagnetic Interference ◽  
Low Voltage ◽  
Current Source ◽  
Building Blocks ◽  
Cmos Technology ◽  
Threshold Region ◽  
Output Current ◽  
Current Generator ◽  
Technology Process

The paper deals with the immunity to Electromagnetic Interference (EMI) of the current source for Ultra-Low-Voltage Integrated Circuits (ICs). Based on the properties of IC building blocks, such as the current-splitter and current correlator, a novel current generator is conceived. The proposed solution is suitable to provide currents to ICs operating in the sub-threshold region even in the presence of an electromagnetic polluted environment. The immunity to EMI of the proposed solution is compared with that of a conventional current mirror and evaluated by analytic means and with reference to the 180 nm CMOS technology process. The analysis highlights how the proposed solution generates currents down to nano-ampere intrinsically robust to the Radio Frequency (RF) interference affecting the input of the current generator, differently to what happens to the output current of a conventional mirror under the same conditions.

Ambipolar Carbon Nanotube Transistors with Hybrid Nanodielectric for Low-Voltage CMOS-like Electronics

Nano Futures ◽  
2021 ◽  
Author(s):  
Luis Portilla ◽  
Jianwen Zhao ◽  
Jing Zhao ◽  
Luigi Occhipinti ◽  
Vincenzo Pecunia
Keyword(s):  
Carbon Nanotube ◽  
Low Voltage ◽  
Carbon Nanotube Transistors ◽  
Nanotube Transistors
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