3D Stackable and Scalable Binary Ovonic Threshold Switch Devices with Excellent Thermal Stability and Low Leakage Current for High‐Density Cross‐Point Memory Applications

2019 ◽  
Vol 5 (7) ◽  
pp. 1900196 ◽  
Author(s):  
Jongmyung Yoo ◽  
Seong Hun Kim ◽  
Solomon Amsalu Chekol ◽  
Jaehyuk Park ◽  
Changhyuck Sung ◽  
...  
2008 ◽  
Vol 1079 ◽  
Author(s):  
Kazuya Okubo ◽  
Kazuo Kawamura ◽  
Shinich Akiyama ◽  
Yasutoshi Kotaka ◽  
Tsukasa Itani ◽  
...  

ABSTRACTWe report NiSi and Ni(Pt)Si films with excellent thermal stability showing a particular crystal orientation on Si(001). The Ni-silicide film with a deposition temperature of about 200 °C consists of a conformal domain structure. We examined detail crystallographic analysis of silicide and clarified the psudo-epitaxial growth of NiSi(202)//Si(220) [or NiSi(211)//Si(220)] was the key scheme of superior thermal stability. By using this optimized Ni-silicide formation process, we have fabricated Ni-silicide that is thermally stable up to 650 °C and shows low fluctuation in sheet resistance and low leakage current in electrical measurements. This process is a promising candidate for future silicidation technology.


2008 ◽  
Vol 29 (8) ◽  
pp. 845-847 ◽  
Author(s):  
C. H. Cheng ◽  
S. H. Lin ◽  
K. Y. Jhou ◽  
W. J. Chen ◽  
C. P. Chou ◽  
...  

2004 ◽  
Vol 22 (1) ◽  
pp. 182-184 ◽  
Author(s):  
Xiang Wen-Feng ◽  
Lu Hui-Bin ◽  
Chen Zheng-Hao ◽  
He Meng ◽  
Lu Xu-Bing ◽  
...  

2021 ◽  
Vol 285 ◽  
pp. 129120
Author(s):  
Wenxin Liang ◽  
Hongfeng Zhao ◽  
Xiaoji Meng ◽  
Shaohua Fan ◽  
Qingyun Xie

2013 ◽  
Vol 1538 ◽  
pp. 291-302
Author(s):  
Edward Yi Chang ◽  
Hai-Dang Trinh ◽  
Yueh-Chin Lin ◽  
Hiroshi Iwai ◽  
Yen-Ku Lin

ABSTRACTIII-V compounds such as InGaAs, InAs, InSb have great potential for future low power high speed devices (such as MOSFETs, QWFETs, TFETs and NWFETs) application due to their high carrier mobility and drift velocity. The development of good quality high k gate oxide as well as high k/III-V interfaces is prerequisite to realize high performance working devices. Besides, the downscaling of the gate oxide into sub-nanometer while maintaining appropriate low gate leakage current is also needed. The lack of high quality III-V native oxides has obstructed the development of implementing III-V based devices on Si template. In this presentation, we will discuss our efforts to improve high k/III-V interfaces as well as high k oxide quality by using chemical cleaning methods including chemical solutions, precursors and high temperature gas treatments. The electrical properties of high k/InSb, InGaAs, InSb structures and their dependence on the thermal processes are also discussed. Finally, we will present the downscaling of the gate oxide into sub-nanometer scale while maintaining low leakage current and a good high k/III-V interface quality.


2018 ◽  
Vol 65 (2) ◽  
pp. 680-686 ◽  
Author(s):  
Cheng-Jung Lee ◽  
Ke-Jing Lee ◽  
Yu-Chi Chang ◽  
Li-Wen Wang ◽  
Der-Wei Chou ◽  
...  

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