Virtual Qualification of Electronic Hardware

Author(s):  
Michael Osterman ◽  
Abhijit Dasgupta ◽  
Thomas Stadterman
1999 ◽  
Author(s):  
S. E. Salcudean ◽  
R. Six ◽  
R. Barman ◽  
S. Kingdon ◽  
I. Chau ◽  
...  

Abstract A six-degree-of-freedom desktop magnetically levitated haptic interface has been developed by the authors. Its electromechanical design is described in (Salcudean and Parker, 1997). In this paper, aspects of electronic hardware architecture and the control of actuator currents are discussed. To program this device, a new low level applications programming interface (API) that models the haptic interface as a hybrid dynamic system is proposed. The user can define a finite state machine in which every state is a device impedance. State transitions occur upon the satisfaction of linear inequalities in terms of the device location, velocity and force. Examples of the use of such hybrid dynamic systems to produce haptic effects are given.


2021 ◽  
pp. 2140015
Author(s):  
Min Miao ◽  
Hao Zhang ◽  
Hejie Yu ◽  
Lili Cao

With the increasing flourishing of miniaturized, multifunctional, and heterogeneously integrated system in package (SiP), heating problem is becoming more and more serious. In this paper, to meet the heat dissipation needs of the chips thus assembled and to achieve effective thermal management, linear, serpent and spiral shaped microchannel heat sinks were designed and fabricated into copper substrate by electrical discharge machining (EDM) and precision machining technology, acting both as the cooler and mounting base for passive and active SiP interposers. A test platform was set up to characterize the heat dissipation performance of the copper-based microchannel heat sink. The experimental and simulation results show that heat dissipation rate increases with the increasing heat flux density in the range 5–30 W/cm2 for the three microchannel designs, and the peak temperature can all be kept below 340 K (67[Formula: see text]C) even for the highest heat flux. The three designs are compared from the perspective of peak temperature, temperature distribution uniformity and pressure drop. In all, the solution proposed hereby provides a new and optimal option for in-situ cooling for densely integrated electronic hardware.


Author(s):  
David R. Selviah ◽  
Janti Shawash

This chapter celebrates 50 years of first and higher order neural network (HONN) implementations in terms of the physical layout and structure of electronic hardware, which offers high speed, low latency, compact, low cost, low power, mass produced systems. Low latency is essential for practical applications in real time control for which software implementations running on CPUs are too slow. The literature review chapter traces the chronological development of electronic neural networks (ENN) discussing selected papers in detail from analog electronic hardware, through probabilistic RAM, generalizing RAM, custom silicon Very Large Scale Integrated (VLSI) circuit, Neuromorphic chips, pulse stream interconnected neurons to Application Specific Integrated circuits (ASICs) and Zero Instruction Set Chips (ZISCs). Reconfigurable Field Programmable Gate Arrays (FPGAs) are given particular attention as the most recent generation incorporate Digital Signal Processing (DSP) units to provide full System on Chip (SoC) capability offering the possibility of real-time, on-line and on-chip learning.


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